What did Huawei Fellow and chief semiconductor scientist Liao Heng argue about the physical limits facing Western chipmakers such as Nvidia, TSMC, Intel, and Samsung in their pursuit of more powerful processors; how do Nvidia’s increasingly large chips and expanded high-bandwidth
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithogr Liao’s core clai...
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Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithogr
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the m
## Physical ceiling and Nvidia’s example
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Create a landscape editorial hero image for this Studio Global article: What did Huawei Fellow and chief semiconductor scientist Liao Heng argue about the physical limits facing Western chipmakers such as Nvidia,. Article summary: Liao’s core claim was that the Western industry’s established route—ever smaller transistors, ever larger processors, and more attached memory—will eventually hit hard physical limits.. Topic tags: general web, ai, workflow, code, regulation. Style: premium digital editorial illustration, source-backed research mood, clean composition, high detail, modern web publication hero. Use reference image context only for broad subject, composition, and topical grounding; do not copy the exact image. Avoid: logos, brand marks, copyrighted characters, real person likenesses, fake screenshots, UI text, readable text, watermarks, charts with fake numbers, clickbait thumbna
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Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithography tools.
Physical ceiling and Nvidia’s example
Liao argued that Nvidia, TSMC, Intel, Samsung, and others cannot indefinitely gain performance by shrinking and packing in more transistors; the approach faces a physical ceiling.
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What is the short answer to "What did Huawei Fellow and chief semiconductor scientist Liao Heng argue about the physical limits facing Western chipmakers such as Nvidia, TSMC, Intel, and Samsung in their pursuit of more powerful processors; how do Nvidia’s increasingly large chips and expanded high-bandwidth"?
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithogr
What are the key points to validate first?
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithogr Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the m
What did Huawei Fellow and chief semiconductor scientist Liao Heng argue about the physical limits facing Western chipmakers such as Nvidia, TSMC, Intel, and Samsung in their pursuit of more powerful processors; how do Nvidia’s increasingly large chips and expanded high-bandwidth
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithogr Liao’s core clai...
Δημοσιεύτηκε απόΕπεξεργασία με GPT-5.6 LunaΕικόνες δημιουργήθηκαν με GPT Image 1.5
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithogr
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the m
## Physical ceiling and Nvidia’s example
What did Huawei Fellow and chief semiconductor scientist Liao Heng argue about the physical limits facing Western chipmakers such as Nvidia,AI-generated editorial hero image for What did Huawei Fellow and chief semiconductor scientist Liao Heng argue about the physical limits facing Western chipmakers such as Nvidia,.
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Create a landscape editorial hero image for this Studio Global article: What did Huawei Fellow and chief semiconductor scientist Liao Heng argue about the physical limits facing Western chipmakers such as Nvidia,. Article summary: Liao’s core claim was that the Western industry’s established route—ever smaller transistors, ever larger processors, and more attached memory—will eventually hit hard physical limits.. Topic tags: general web, ai, workflow, code, regulation. Style: premium digital editorial illustration, source-backed research mood, clean composition, high detail, modern web publication hero. Use reference image context only for broad subject, composition, and topical grounding; do not copy the exact image. Avoid: logos, brand marks, copyrighted characters, real person likenesses, fake screenshots, UI text, readable text, watermarks, charts with fake numbers, clickbait thumbna
openai.com
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithography tools.
Physical ceiling and Nvidia’s example
Liao argued that Nvidia, TSMC, Intel, Samsung, and others cannot indefinitely gain performance by shrinking and packing in more transistors; the approach faces a physical ceiling.
Studio Global AI
Continue your research
This page includes a source-backed answer you can continue inside Studio Global.
What is the short answer to "What did Huawei Fellow and chief semiconductor scientist Liao Heng argue about the physical limits facing Western chipmakers such as Nvidia, TSMC, Intel, and Samsung in their pursuit of more powerful processors; how do Nvidia’s increasingly large chips and expanded high-bandwidth"?
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithogr
What are the key points to validate first?
Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the most advanced lithogr Liao’s core claim was that the Western industry’s established route—ever-smaller transistors, ever-larger processors, and more attached memory—will eventually hit hard physical limits. Huawei’s answer is to seek system-level speed and density gains without relying solely on the m
He used the direction of Nvidia’s AI accelerators—larger processor dies or packages with growing amounts of high-bandwidth memory (HBM)—as evidence that conventional scaling is becoming increasingly difficult: expanding chip and memory scale also runs into limits of area, power, heat, interconnects, and manufacturability.
This was Liao’s argument, not a demonstrated industry consensus; independent experts have differed on how novel or consequential Huawei’s proposed alternative will prove to be.
Why Huawei chose another route
US sanctions have cut Huawei off from key advanced chipmaking suppliers, including ASML’s leading lithography systems, making a race based purely on the newest process nodes far less viable for it.
Huawei therefore proposed shifting the principal optimization target from transistor geometry to how quickly signals and data move through a chip and the wider computing system.
Tau Scaling Law and LogicFolding
The Tau (τ) Scaling Law is Huawei’s proposed successor-style framework to geometric transistor scaling: it prioritizes reducing signal/data-transit time through chips and computing systems.
LogicFolding is the associated Tau-based chip architecture, intended to improve effective density and performance through architectural/system design rather than simply shrinking transistor dimensions.
Huawei said its Kirin smartphone processors due later in 2026 would be the first to use LogicFolding; their launch and subsequent examination by industry research and teardown firms would provide the first meaningful external test of the claims.
“18-story pagoda” versus the “five-layer cake”
Liao described the AI/compute value chain as an 18-layer “pagoda,” a more granular stack running from raw materials, chemicals and manufacturing equipment through transistor processes, packaging, chip architecture, compilers and software, to algorithms, models and applications.
It broadly parallels Nvidia CEO Jensen Huang’s five-layer “cake”—energy, chips/computing infrastructure, cloud data centers, AI models, and applications—but Liao’s model disaggregates those broad categories into the many industrial and technical dependencies beneath them.
His policy conclusion was that strategic competition and export controls mean the US and China each need a complete, self-sufficient semiconductor manufacturing and supply ecosystem, rather than assuming access to one integrated global chain. The supplied evidence supports Huawei’s push to integrate China’s supply chain, but gives limited direct detail on Liao’s exact wording about two separate complete ecosystems.
kucoin.com
Huawei scientist warns that NVIDIA's chip scaling is ...
He used the direction of Nvidia’s AI accelerators—larger processor dies or packages with growing amounts of high-bandwidth memory (HBM)—as evidence that conventional scaling is becoming increasingly difficult: expanding chip and memory scale also runs into limits of area, power, heat, interconnects, and manufacturability.
This was Liao’s argument, not a demonstrated industry consensus; independent experts have differed on how novel or consequential Huawei’s proposed alternative will prove to be.
Why Huawei chose another route
US sanctions have cut Huawei off from key advanced chipmaking suppliers, including ASML’s leading lithography systems, making a race based purely on the newest process nodes far less viable for it.
Huawei therefore proposed shifting the principal optimization target from transistor geometry to how quickly signals and data move through a chip and the wider computing system.
Tau Scaling Law and LogicFolding
The Tau (τ) Scaling Law is Huawei’s proposed successor-style framework to geometric transistor scaling: it prioritizes reducing signal/data-transit time through chips and computing systems.
LogicFolding is the associated Tau-based chip architecture, intended to improve effective density and performance through architectural/system design rather than simply shrinking transistor dimensions.
Huawei said its Kirin smartphone processors due later in 2026 would be the first to use LogicFolding; their launch and subsequent examination by industry research and teardown firms would provide the first meaningful external test of the claims.
“18-story pagoda” versus the “five-layer cake”
Liao described the AI/compute value chain as an 18-layer “pagoda,” a more granular stack running from raw materials, chemicals and manufacturing equipment through transistor processes, packaging, chip architecture, compilers and software, to algorithms, models and applications.
It broadly parallels Nvidia CEO Jensen Huang’s five-layer “cake”—energy, chips/computing infrastructure, cloud data centers, AI models, and applications—but Liao’s model disaggregates those broad categories into the many industrial and technical dependencies beneath them.
His policy conclusion was that strategic competition and export controls mean the US and China each need a complete, self-sufficient semiconductor manufacturing and supply ecosystem, rather than assuming access to one integrated global chain. The supplied evidence supports Huawei’s push to integrate China’s supply chain, but gives limited direct detail on Liao’s exact wording about two separate complete ecosystems.
kucoin.com
Huawei scientist warns that NVIDIA's chip scaling is ...