Inside the Two New Systems Applied Materials Built to Unlock Next-Gen 3D Chip Scaling

The Centris Spectral SiN ALD system changes this by using innovative microwave plasma technology instead of traditional capacitively-coupled or inductively-coupled plasma sources . Microwave-generated plasma can reach high radical densities without the energetic ion bombardment that damages fragile nanostructures.

This capability lets the system deposit dense, uniform SiN layers inside extreme high-aspect-ratio features—such as the inner spacers and gate dielectrics of vertically stacked nanosheets—while keeping the wafer temperature low enough to protect surrounding materials .

Scaling Barriers in Logic and Memory

For logic, the system directly enables uniform dielectric film formation in the tight geometries of GAA transistors. As Samsung, TSMC, and Intel push into 2nm-class nodes and below, the ability to precisely place insulator films in fully surrounded gate structures becomes non-negotiable . Without tools like this, transistor leakage, reliability, and yield would suffer.

For memory, the system also supports conformal SiN deposition in multi-layer 3D NAND stacks. As manufacturers push beyond 200 layers, the vertical channels grow deeper, demanding consistent film quality down the entire pillar .

Producer Selectra Mo Etch: Selectively Removing Molybdenum Without Collateral Damage

The second system announced, Producer Selectra Mo Etch, addresses an equally persistent challenge: selectively removing molybdenum (Mo)—now the wordline metal of choice in advanced 3D NAND—with atomic-scale precision while leaving all adjacent materials intact .

The system uses specially engineered radical chemistries that react with Mo but not with the surrounding dielectrics, other metals, or semiconductors. This allows damage-free etching in confined, recessed locations where physical sputtering or wet chemistry would cause undercutting, corrosion, or pattern collapse .

Scaling Barriers in Memory and Logic

The primary use case is 3D NAND wordline separation. As memory makers stack more layers—200+ and climbing—the molybdenum wordlines must be cleanly isolated from one another inside the memory stack. Any collateral etch damage to neighboring insulators or floating gates would ruin the cell. The Selectra system’s ability to precisely recess Mo at exact locations inside the stack is what keeps 3D NAND scaling viable .

In logic, the system provides atomic-level, damage-free removal of metal films in tight 3D structures. As transistor designs transition from FinFET to GAA, the precision etch required to define contacts, gates, and interconnects becomes drastically more demanding .

Why These Tools Matter for the AI Chip Race

Both systems sit at the center of a broader industry inflection. AI computing demand is pushing chip designers to adopt GAA logic architectures and higher-layer 3D NAND simultaneously, creating an equipment bottleneck that lithography alone cannot solve .

Performance, power efficiency, and manufacturing yield now depend as much on materials engineering—how well a fab can deposit a 2-nm-thick insulator or selectively recess a metal line a few atoms deep—as on optical resolution. Applied Materials explicitly framed these tools as AI chip enablers, noting the roadmaps of its customers already rely on them for volume production .

By addressing the highest-value precision challenges in both logic and memory, these two systems position Applied Materials to capture the equipment spend associated with the industry’s simultaneous transitions at the 2nm logic node and in high-layer-count 3D NAND .