Perhaps Samsung's most attention-grabbing reveal was zHBM, a concept architecture that stacks high-bandwidth memory vertically directly above an AI accelerator, rather than beside it on a silicon interposer . Advanced wafer-bonding technology makes this arrangement possible
. Samsung claims zHBM could deliver ~8x the performance of HBM5, over 10x the memory density, 3x the energy efficiency, and reduce thermal resistance by more than half
. It is important to note that zHBM was shown as a physical concept model (mock-up), not a shipping product, and no commercialization timetable was provided
. The architecture, if realized, would eliminate the silicon interposer that has underpinned every HBM generation to date
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Samsung also introduced zNAND-O, a concept that combines V-NAND technology with through-silicon vias (TSV) to vertically stack 4 or 8 NAND chips into a single package . The architecture is designed for edge AI workloads, with Samsung highlighting improvements in space utilization, I/O performance, and latency
. Like zHBM, zNAND-O was a concept model without a specific commercialization date
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Samsung showcased HBM4E samples — the next step in its HBM roadmap — and HBM5 concept models at its booth . The company began industry-first HBM4 mass production in February 2026 using its 1c DRAM and 4nm chip technology, and by May 2026 became the first company to deliver HBM4E samples to global customers
. Mass production of HBM4E is targeted for 2027, using Samsung's 4th-generation Hybrid Bonding process
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Samsung demonstrated the LPDDR5X-PIM, which it described as the industry's first LPDDR memory with on-chip processing-in-memory (PIM) capability . The design executes partial data operations inside the memory itself, reducing data movement between memory and the CPU/GPU for AI inference workloads, which can improve efficiency and reduce power consumption
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Samsung also showcased its next-generation enterprise SSD platforms, the PM1763 and BM1773, designed for AI infrastructure workloads .
According to Counterpoint Research, Samsung held 39% of the global DRAM market by revenue in Q2 2026, overtaking SK Hynix which fell to 26% (Micron was at 25%) . The shift was driven by strong demand for commodity DRAM and Samsung's expanding HBM output, while SK Hynix faced stagnant HBM pricing
. Despite SK Hynix's revenue growing 214% year-over-year, its market share declined from 39% in Q2 2025 to 26% in Q2 2026
. This marks Samsung regaining the No. 1 spot after SK Hynix briefly led in prior quarters
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During its Q2 2026 earnings call on July 30, Samsung announced a major strategic shift: it plans to allocate 60–70% of its total memory production capacity under long-term supply agreements (LTAs) .
Key details of the LTA structure:
According to a Bank of America Merrill Lynch survey, the contract terms clearly favor the supplier, with price cuts capped at 5% per quarter while upside potential is unrestricted .
Samsung was not the only company making news at FMS 2026:
Bottom line: Samsung's FMS 2026 message was about architectural reinvention — zHBM and zNAND-O represent radical departures from current memory designs — backed by strong DRAM market momentum and a new LTA-driven business model that locks in 60–70% of capacity for AI customers. The broader industry is clearly aligning around tiered memory architectures (HBM, HBF, SSD) and the PCIe 6.0 interface, signaling a period of intense competition and innovation in AI infrastructure memory.