Samsung Unveils HBM5 at Computex 2026 with 2nm Base Die and New Thermal Tech

• 2nm in-house base die: Samsung plans to manufacture the base die on its own 2nm foundry process—an aggressive node shrink for a memory product and a first for its HBM lineup .
• Heat Path Block (HPB): A thermal design that creates additional heat dissipation paths between physical die surfaces, directly lowering thermal resistance and improving operational stability. Samsung confirmed HPB has already been implemented and verified through HBM4E .
• Stack configurations: HBM5 is being prepared in 12-, 16-, and 20-layer DRAM stacks to meet growing capacity demands from AI accelerators .

On the timeline, Samsung has already shipped 12-layer HBM4E samples as of May 2026, with HBM5 mass production expected around 2028 . Song added that HPB's final deployment timing could shift forward based on customer demand and market conditions .

The Competitive Landscape: Samsung vs. SK Hynix

Computex 2026 laid bare the contrasting strategies of the world's two dominant HBM suppliers:

Samsung's play: A "technology super-gap" strategy—leapfrogging to a next-generation node and introducing HPB to stake a claim as the most advanced supplier . The HBM5 reveal follows Samsung's earlier milestone as the first to mass-produce HBM4 .

SK Hynix's counter: Doubling down on proven market dominance and supply scale. SK Hynix held a 58% share of the global HBM market in Q1 2026, compared to Samsung's 21%, according to Counterpoint Research . Chairman Chey Tae-won used the same event to promise a doubling of wafer capacity within five years, citing an expected memory shortage through 2030 .

Nvidia's position: CEO Jensen Huang publicly praised SK Hynix's success at Computex while making no mention of Samsung . The silence underlined SK Hynix's current chokehold as the primary HBM supplier for Nvidia's AI GPUs. However, Nvidia is known to pursue a dual-supplier strategy to maintain negotiating leverage, keeping Samsung in contention for future accelerator generations .

Why Cooling Became the Decisive Battleground

The shift to 16- and 20-layer HBM stacks has made heat dissipation a primary bottleneck for AI accelerator performance . HBM dies are stacked vertically and tightly integrated with logic chips, meaning heat trapped between layers degrades signal integrity, increases power draw, and shortens component lifetime.

Samsung's HPB attacks this problem at the architecture level. Rather than relying solely on external cooling solutions, HPB creates dedicated heat-transfer pathways through the physical layer (PHY) of the chip itself, routing thermal energy out of the stack more efficiently . The design was validated on HBM4E for structural integrity, package stability, and thermal performance, Samsung said .

SK Hynix is also racing to secure next-generation HBM cooling technologies, but Samsung's public bet on HPB signals it believes thermal innovation—not just stacking height—can overcome its rival's supply-chain advantage . With the HBM market projected to stay sold out through 2026 and AI accelerator roadmaps demanding ever-faster memory, whoever wins the thermal race may win the socket in Nvidia's next-generation Rubin and beyond.