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Open3D-PIMC Brings an Open Programming Model to 3D AI Chips
Tsingway and BAAI open sourced Open3D PIMC as a FlagOS framework for 3D compute chips. The project targets compute in memory and chiplet oriented hardware, where reducing data movement is central to improving effective bandwidth and energy use.
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Key takeaways
- Tsingway and BAAI open sourced Open3D PIMC as a FlagOS framework for 3D compute chips.
- The project targets compute in memory and chiplet oriented hardware, where reducing data movement is central to improving effective bandwidth and energy use.
- FlagOS says its broader ecosystem has adapted more than 30 AI chips from over 20 vendors; that claim should not be read as proof that Open3D PIMC itself is production ready across every device.
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openai.comCreate a landscape editorial hero image for this Studio Global article: What did Tsingway and the Beijing Academy of Artificial Intelligence announce at the China Computing Power Conference about open-sourcing Op. Article summary: Tsingway and BAAI announced that they had open-sourced Open3D-PIMC as a FlagOS component: a unified programming model and framework intended for emerging 3D compute chips rather than a proven, production-ready universal . Topic tags: general, general web, user generated, education. Style: premium digital editorial illustration, source-backed research mood, clean composition, high detail, modern web publication hero. Use reference image context only for broad subject, composition, and topical grounding; do not copy the exact image. Avoid: logos, brand marks, copyrighted characters, real person likenesses, fake screenshots, UI text, readable text, watermarks, cha
Tsingway and the Beijing Academy of Artificial Intelligence (BAAI) announced the open-source release of Open3D-PIMC, a programming model and software framework for emerging three-dimensional compute chips. Positioned within the FlagOS stack, it is meant to offer a shared developer-facing layer for heterogeneous AI hardware instead of requiring a distinct software stack for every accelerator vendor. 1
The problem Open3D-PIMC is designed to address
New accelerator designs increasingly combine compute-in-memory techniques, chiplets and reconfigurable logic. Their promise is to reduce the distance data must travel between memory and compute, potentially improving effective bandwidth and lowering the energy associated with data transfer. 1
That hardware diversity also creates a software problem: each architecture can expose different instruction sets, memory behavior and execution models. Without a common layer, developers may need to port and optimize the same workload separately for each chip.
Open3D-PIMC is intended to counter that fragmentation. Its stated goal is to replace the "one chip, one software stack" pattern with a unified programming approach for 3D compute hardware. 1
How the programming model works
The framework asks developers to express two high-level elements of a workload:
- Data distribution and layout — where data should reside and how it is organized.
- Task partitioning — how the work is divided across available compute resources.
Open3D-PIMC is then intended to map and optimize that description for a target device. Hardware-specific instruction sets and microarchitectural features can remain in plugins, allowing chip providers to retain proprietary implementation details while exposing a more consistent interface to developers. 1
In principle, this separation could make workloads easier to bring to new accelerators. In practice, the quality of the hardware plugins and compiler back ends will determine whether performance is portable as well as functionality.
Its place in the FlagOS stack
BAAI leads FlagOS as an open infrastructure effort for heterogeneous AI computing. FlagOS has been framed as an intermediate software layer designed to make large models usable across different underlying AI chips. 3
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Open3D-PIMC extends that direction to 3D compute chips. The broader FlagOS initiative describes a "develop once, run on many chips" objective across GPUs, NPUs, GPGPUs, DSAs, RISC-V AI devices and Arm-class architectures. 1
FlagOS materials say the ecosystem has adapted more than 30 AI chips from over 20 chip vendors and can bring up new mainstream large models across multiple chips within a day. Those are ecosystem-level claims, however—not independent evidence that Open3D-PIMC has already achieved equal coverage, correctness or performance on every supported device. 1
Tsingway’s hardware role and the Qwen demonstration claim
Tsingway presents its second-generation reconfigurable processor as a hardware example for the framework’s target category, combining 3D compute-in-memory integration, chiplet packaging and reconfigurable computing. BAAI, meanwhile, presents Open3D-PIMC as part of an effort to establish an open compiler foundation for 3D compute chips. 1
The release reporting also says FlagOS completed day-of-release adaptation verification for Alibaba’s Qwen3.8-2.4T-A95B model on nine AI-chip platforms in August 2026. Qwen3.8-2.4T-A95B is an open-weight mixture-of-experts model with 2.4 trillion total parameters and 95 billion active parameters during inference. 1
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This is useful evidence that the wider FlagOS effort is pursuing rapid model bring-up. It is not, by itself, a reproducible benchmark for Open3D-PIMC’s compiler portability, latency, energy efficiency or reliability across 3D hardware.
What is established—and what is not
The announcement establishes that Open3D-PIMC has been released as open-source software and that its designers are pursuing a common abstraction for a new class of AI accelerators. 1
Several central questions remain open:
- Whether chip makers beyond the initial participants will deliver and maintain production-quality plugins.
- Whether applications can retain competitive performance when moved between substantially different architectures.
- How the tooling performs for debugging, fault handling, profiling and long-term maintenance.
- Whether independent, reproducible results will validate cross-vendor correctness, throughput, latency and energy claims.
The developers said they would continue work on standardization, cross-vendor support and developer tooling, with further 3D-chip optimization results planned for the fourth quarter of 2026. 1
Bottom line
Open3D-PIMC is best understood as an open entry point and proposed common compiler/framework layer for 3D AI hardware. Its appeal is straightforward: developers describe the workload at a higher level, while vendor plugins carry hardware-specific complexity underneath.
That is an important ambition for compute-in-memory and chiplet-based accelerators. But open source release and broad ecosystem claims are not the same as mature, independently validated multi-vendor deployment. The decisive evidence will be sustained external contributions and transparent benchmarks across genuinely different chips. 1
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What is the short answer to "Open3D-PIMC Brings an Open Programming Model to 3D AI Chips"?
Tsingway and BAAI open sourced Open3D PIMC as a FlagOS framework for 3D compute chips.
What are the key points to validate first?
Tsingway and BAAI open sourced Open3D PIMC as a FlagOS framework for 3D compute chips. The project targets compute in memory and chiplet oriented hardware, where reducing data movement is central to improving effective bandwidth and energy use.
What should I do next in practice?
FlagOS says its broader ecosystem has adapted more than 30 AI chips from over 20 vendors; that claim should not be read as proof that Open3D PIMC itself is production ready across every device.
Sources
news.cn硬件为骨，开源为脉：Open3D ‑PIMC补齐国产算力软件生态关键拼图
china.org.cnInternet conference eyes new development empowered by digital, AI technologies
cctvplus.comAI open-source system FlagOS 2.0 released at ZGC Forum - cctv+
runtimewire.comQwen opens a 2.4T model to self-hosting, with 95B active parameters
pandaily.com