Huawei Connect 2026 was less about a standalone accelerator than about the network around it. Huawei introduced the Atlas 960E SuperPoD, an AI supernode built around Ascend 960 NPUs, UnifiedBus and a new optical-interconnect engine called Hi-ONE. The company’s objective is to make thousands of processors operate as a tightly coupled system for training and inference at the scale of 10-trillion-parameter models.
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The headline specifications
Huawei describes the Atlas 960E as the industry’s first near-package-optics (NPO)-based SuperPoD. With UnifiedBus providing unified memory addressing, a single system is specified to scale to 4,096 NPUs, provide 8 EFLOPS of FP8 compute and 16 EFLOPS of FP4 compute, and include up to 1 PB of HBM capacity.
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Those figures are important, but they should be read correctly: they are system-level Huawei specifications, not independently verified measurements of a single Ascend 960 chip or a cross-vendor benchmark result.
Huawei also says the 960E uses 5,500 Hi-ONE units instead of 48,000 conventional 800G optical modules for the same NPU connectivity, cutting power consumption by more than 550 kilowatts and doubling system reliability.
13 The company’s broader pitch is that interconnect design—rather than peak chip compute alone—will increasingly determine whether very large model workloads scale efficiently.
What NPO, Hi-ONE and UnifiedBus do
Near-package optics moves optical links closer to compute
Near-package optics places optical connectivity close to the processor package, reducing the distance signals must travel electrically before conversion to optical transmission. Huawei says this approach delivers higher speed and lower energy use in its SuperPoD architecture.
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Hi-ONE is the optical engine
Hi-ONE is Huawei’s optical-interconnect component for the NPO design. Huawei describes it as integrating the light source and using a high-bandwidth, low-latency, low-power design.
13 Reporting on the announcement cites a 7.2 Tbps, 36-lane implementation at 200 Gbps per lane and a Huawei-stated 10-nanosecond communication-latency figure for the optical engine.
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That number should not be confused with end-to-end supernode latency. Separate coverage reports round-trip latency of about 2 microseconds across the broader UnifiedBus-connected system.
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UnifiedBus makes a large system behave more like one machine
UnifiedBus is the fabric and memory-addressing layer intended to connect compute, memory and storage resources. In the Atlas 960E, it enables unified memory addressing across the 4,096-NPU system.
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Huawei has also said that a UnifiedBus-based SuperCluster could scale to as many as one million NPUs. That is an architectural scale claim, rather than a published deployment figure.
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What Huawei claims for 10-trillion-parameter workloads
Huawei positioned the Atlas 960E for training and inference of models with up to 10 trillion parameters.
6 Reports on the launch say Huawei claims up to a 2.3× training-throughput improvement and up to a 2.5× inference-throughput improvement over the Atlas 950 for specified 10-trillion-parameter workloads.
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These claims point to the practical rationale for NPO and UnifiedBus: at this scale, moving activations, weights and intermediate data between accelerators can become as important as arithmetic throughput. Huawei has not provided public independent benchmarks that would establish how the system compares across a broader range of workloads or against Nvidia alternatives.
How Ascend 960 is meant to improve on Ascend 950
Huawei’s prior Ascend roadmap said the Ascend 960 would double the Ascend 950’s compute performance, memory-access bandwidth, memory capacity and number of interconnect ports.
30 The 960E announcement applies that next-generation silicon to a more tightly integrated optical system.
The distinction matters because several related product names appear in Huawei’s roadmap. The newly detailed Atlas 960E is the 4,096-NPU NPO-based system described at Connect 2026. Earlier roadmap materials also referred to a larger future Atlas 960 SuperPoD configuration. Readers should avoid treating every Atlas 960 figure reported across different announcements as specifications for the same shipping configuration.
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Roadmap: Ascend 960DT and 960PR
Huawei accelerated two Ascend 960 variants:
- Ascend 960DT, designed for training, is planned for Q1 2027, three quarters earlier than Huawei’s prior schedule.
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- Ascend 960PR, aimed at inference, is planned for Q3 2027, one quarter earlier than the previous plan.
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The earlier roadmap gave a Q4 2027 target for Ascend 960 and stated 2 PFLOPS FP8 and 4 PFLOPS FP4 for the chip.
30 The Connect 2026 announcement provides more detail on the platform direction, but public information remains limited on independently verifiable per-chip specifications for the DT and PR variants.
Why the launch looks like an Nvidia-style infrastructure play
Huawei is attempting to assemble an end-to-end AI infrastructure stack: Ascend processors, high-bandwidth memory, optical interconnects, Atlas systems and the software layers needed to deploy models. Its stated strategy is part of a broader effort to reduce dependence on foreign semiconductor suppliers, particularly Nvidia.
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Manufacturing remains an important caveat. U.S. export controls bar Huawei from working with TSMC, and Huawei has not publicly identified the manufacturer of these chips. Analysts have linked Huawei with China’s SMIC, but that relationship should be treated as analyst assessment rather than a confirmed manufacturer disclosure.
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Model optimization will be equally consequential. Hardware capacity alone does not replace a mature software ecosystem; developers need frameworks, compilers and tuned model implementations. Reports that DeepSeek plans to use Huawei’s Ascend 950DT for inference while continuing to use Nvidia hardware for training illustrate both Huawei’s progress and the remaining challenge.
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Supply, overseas expansion and Eric Xu’s safety comments
The strategic ambition faces a near-term production constraint. Huawei rotating chairman Eric Xu said the company cannot produce enough AI-computing equipment to meet demand in China and therefore does not plan a full-scale international expansion, although it supplies some markets with strong demand.
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Xu also said Chinese AI developers may not yet have models advanced enough to encounter the frontier safety risks reported by leading U.S. companies. Reuters reported that he argued for continued capability development while balancing innovation with risk.
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Bottom line
The Atlas 960E is Huawei’s clearest statement that AI infrastructure competition will be fought at the system level: processors, memory, optics, fabrics and software working together. The announced 4,096-NPU, 8-EFLOPS FP8, 1-PB-HBM configuration is ambitious, and NPO is the technical centerpiece.
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But it remains a roadmap-stage platform whose most consequential performance figures come from Huawei. Its ability to turn that design into a durable alternative to Nvidia will depend on production capacity, software adoption, real-world model performance and the availability of systems beyond China.
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