Lisa Su previewed sixth generation EPYC Verano at the October 12, 2026 OCP keynote; AMD says it is the first EPYC CPU with an LPDDR memory interface and is planned for 2027. AMD’s Helion strategy positions CPUs to run AI agent workloads alongside GPUs, not simply replace GPUs for inference.
Published byEdited with GPT-6 LunaImages generated with GPT Image 2
Research answer

Create a landscape editorial hero image for this Studio Global article: What did AMD CEO Lisa Su reveal about the sixth-generation EPYC “Verano” server processor at the opening keynote of the 2026 OCP Global Summ. Article summary: Lisa Su showed sixth-generation EPYC “Verano” at the October 12 opening keynote of the 2026 OCP Global Summit in San Jose; AMD’s accompanying material identifies it as its first EPYC CPU with an LPDDR memory interface, p. Topic tags: general, general web. Style: premium digital editorial illustration, source-backed research mood, clean composition, high detail, modern web publication hero. Use reference image context only for broad subject, composition, and topical grounding; do not copy the exact image. Avoid: logos, brand marks, copyrighted characters, real person likenesses, fake screenshots, UI text, readable text, watermarks, charts with fake numbers, clic
At the October 12, 2026 opening keynote of the OCP Global Summit in San Jose, AMD CEO Lisa Su showed the company’s sixth-generation EPYC processor, codenamed “Verano.” AMD says Verano will be its first EPYC CPU with an LPDDR memory interface and is planned to be available in 2027. The preview also fits AMD’s effort to give CPUs a larger role in infrastructure for agentic AI, while leaving many detailed specifications unconfirmed. 3
AMD’s keynote recap identifies Verano as a sixth-generation data-center EPYC processor and confirms the LPDDR interface and 2027 availability target. It does not specify core count, socket, memory-module design, or GPU interconnect in the material cited here. 3
Technical reports describe Verano as part of the EPYC 9006 “LP” family, with Zen 6 cores and the same TSMC 2-nanometer process as EPYC “Venice.” Those details come from reporting rather than the cited AMD keynote recap, so they should be treated as reported specifications, not as details confirmed in AMD’s summary. 11
13
Reports also identify LPDDR5X memory through SOCAMM2 modules. The available material does not establish whether those modules are replaceable or confirm their relationship to NVIDIA’s Vera CPU. 11
13
AMD’s Helion blueprint supports different mixes of CPU and GPU resources. AMD describes CPU-led configurations for agent execution at hyperscale, as well as enterprise configurations that combine CPU execution with GPU inference. 21 That design gives CPUs a larger part in running AI agents; it does not mean GPUs are being removed from inference workloads.
Verano’s expected role should be kept distinct from what is confirmed about Helion today: AMD’s keynote recap previews Verano, but the sources cited here do not confirm exactly when or how Verano will be integrated into specific Helion rack configurations. 3
21
Some technical coverage reports up to 192 Verano cores, while earlier coverage cited 72. The figures reflect changing reports, not a core-count specification stated in AMD’s keynote recap. The supplied material also does not establish whether 192 cores would be in a single processor or a two-processor configuration. 3
5
13
Likewise, the available AMD material does not confirm the reported SP8 platform, a comparison with Venice’s SP7, or xGMI links to future Instinct MI500 GPUs. Reports mention these details, but they are not verified by the cited AMD announcement. 3
11
13
Su’s keynote presented CPUs as part of a broader AI-infrastructure opportunity. She forecast that the CPU market would grow at approximately 50% annually over the next four to five years, reaching more than $200 billion by 2030. She also projected that the data-center AI-accelerator market could approach $1.5 trillion by 2030. These are market forecasts, not guarantees of AMD sales or Verano demand. 29
Separately, reporting on Su’s remarks says she put inference at roughly 60% of AI compute in 2026. That figure describes the reported share of AI compute, not 60% of the projected 2030 accelerator market. 30
The clearest takeaway is that Verano is a 2027 EPYC preview built around an LPDDR interface, announced as AMD pushes for a larger CPU role in agentic-AI systems. Its detailed core count, platform configuration, and rack integration remain less certain than the headline announcement. 3
21
Studio Global AI
This page includes a source-backed answer you can continue inside Studio Global.
Lisa Su previewed sixth generation EPYC Verano at the October 12, 2026 OCP keynote; AMD says it is the first EPYC CPU with an LPDDR memory interface and is planned for 2027.
Lisa Su previewed sixth generation EPYC Verano at the October 12, 2026 OCP keynote; AMD says it is the first EPYC CPU with an LPDDR memory interface and is planned for 2027. AMD’s Helion strategy positions CPUs to run AI agent workloads alongside GPUs, not simply replace GPUs for inference.
Su forecast the CPU market could grow at about 50% annually to more than $200 billion by 2030; that is a market forecast, not a Verano performance claim.
Lisa Su previewed sixth generation EPYC Verano at the October 12, 2026 OCP keynote; AMD says it is the first EPYC CPU with an LPDDR memory interface and is planned for 2027. AMD’s Helion strategy positions CPUs to run AI agent workloads alongside GPUs, not simply replace GPUs for inference.
Published byEdited with GPT-6 LunaImages generated with GPT Image 2
Research answer

Create a landscape editorial hero image for this Studio Global article: What did AMD CEO Lisa Su reveal about the sixth-generation EPYC “Verano” server processor at the opening keynote of the 2026 OCP Global Summ. Article summary: Lisa Su showed sixth-generation EPYC “Verano” at the October 12 opening keynote of the 2026 OCP Global Summit in San Jose; AMD’s accompanying material identifies it as its first EPYC CPU with an LPDDR memory interface, p. Topic tags: general, general web. Style: premium digital editorial illustration, source-backed research mood, clean composition, high detail, modern web publication hero. Use reference image context only for broad subject, composition, and topical grounding; do not copy the exact image. Avoid: logos, brand marks, copyrighted characters, real person likenesses, fake screenshots, UI text, readable text, watermarks, charts with fake numbers, clic
At the October 12, 2026 opening keynote of the OCP Global Summit in San Jose, AMD CEO Lisa Su showed the company’s sixth-generation EPYC processor, codenamed “Verano.” AMD says Verano will be its first EPYC CPU with an LPDDR memory interface and is planned to be available in 2027. The preview also fits AMD’s effort to give CPUs a larger role in infrastructure for agentic AI, while leaving many detailed specifications unconfirmed. 3
AMD’s keynote recap identifies Verano as a sixth-generation data-center EPYC processor and confirms the LPDDR interface and 2027 availability target. It does not specify core count, socket, memory-module design, or GPU interconnect in the material cited here. 3
Technical reports describe Verano as part of the EPYC 9006 “LP” family, with Zen 6 cores and the same TSMC 2-nanometer process as EPYC “Venice.” Those details come from reporting rather than the cited AMD keynote recap, so they should be treated as reported specifications, not as details confirmed in AMD’s summary. 11
13
Reports also identify LPDDR5X memory through SOCAMM2 modules. The available material does not establish whether those modules are replaceable or confirm their relationship to NVIDIA’s Vera CPU. 11
13
AMD’s Helion blueprint supports different mixes of CPU and GPU resources. AMD describes CPU-led configurations for agent execution at hyperscale, as well as enterprise configurations that combine CPU execution with GPU inference. 21 That design gives CPUs a larger part in running AI agents; it does not mean GPUs are being removed from inference workloads.
Verano’s expected role should be kept distinct from what is confirmed about Helion today: AMD’s keynote recap previews Verano, but the sources cited here do not confirm exactly when or how Verano will be integrated into specific Helion rack configurations. 3
21
Some technical coverage reports up to 192 Verano cores, while earlier coverage cited 72. The figures reflect changing reports, not a core-count specification stated in AMD’s keynote recap. The supplied material also does not establish whether 192 cores would be in a single processor or a two-processor configuration. 3
5
13
Likewise, the available AMD material does not confirm the reported SP8 platform, a comparison with Venice’s SP7, or xGMI links to future Instinct MI500 GPUs. Reports mention these details, but they are not verified by the cited AMD announcement. 3
11
13
Su’s keynote presented CPUs as part of a broader AI-infrastructure opportunity. She forecast that the CPU market would grow at approximately 50% annually over the next four to five years, reaching more than $200 billion by 2030. She also projected that the data-center AI-accelerator market could approach $1.5 trillion by 2030. These are market forecasts, not guarantees of AMD sales or Verano demand. 29
Separately, reporting on Su’s remarks says she put inference at roughly 60% of AI compute in 2026. That figure describes the reported share of AI compute, not 60% of the projected 2030 accelerator market. 30
The clearest takeaway is that Verano is a 2027 EPYC preview built around an LPDDR interface, announced as AMD pushes for a larger CPU role in agentic-AI systems. Its detailed core count, platform configuration, and rack integration remain less certain than the headline announcement. 3
21
Studio Global AI
This page includes a source-backed answer you can continue inside Studio Global.
Lisa Su previewed sixth generation EPYC Verano at the October 12, 2026 OCP keynote; AMD says it is the first EPYC CPU with an LPDDR memory interface and is planned for 2027.
Lisa Su previewed sixth generation EPYC Verano at the October 12, 2026 OCP keynote; AMD says it is the first EPYC CPU with an LPDDR memory interface and is planned for 2027. AMD’s Helion strategy positions CPUs to run AI agent workloads alongside GPUs, not simply replace GPUs for inference.
Su forecast the CPU market could grow at about 50% annually to more than $200 billion by 2030; that is a market forecast, not a Verano performance claim.