Important Caveat: All information in this article is based on a single unverified leak from X user Gotou_kai3, published on June 15–16, 2026. AMD has not officially confirmed any of these specifications, and final product details may change .

The Core Trade-Off: Why Remove the iGPU?

The logic is one of silicon economics. The tiny 2-CU Radeon 710M iGPU found on current AM5 Ryzen processors is not a gaming solution; it serves primarily as a convenience for BIOS access, basic display output, and troubleshooting. By eliminating it, AMD frees up critical physical area on the I/O die to accommodate a new NPU without inflating manufacturing costs .

The Immediate Consequence: Every desktop built around a Ryzen "Olympic Ridge" CPU will mandate a discrete graphics card. Even tasks as simple as navigating the UEFI, installing an operating system, or diagnosing a faulty GPU will require a working dedicated video card in the system . For system builders and IT departments who rely on the iGPU as a fail-safe, this represents a meaningful reduction in system flexibility.

Architecture and Specifications: A Major Chiplet Overhaul

The Zen 6 architecture reportedly marks its biggest chiplet revamp since Zen 2. The move to advanced TSMC nodes allows a dramatic increase in core density while keeping die sizes in check.

• Manufacturing Process: The Core Compute Dies (CCDs) will use TSMC's cutting-edge N2P (2nm-class) process, while the I/O Die will be built on the N3P (3nm) node . The new CCD measures roughly 76mm², staying comparable to Zen 5 in physical size despite the transistor density leap .
• CPU Cores: Each CCD now packs up to 12 Zen 6 cores, a 50% jump from the 8-core CCDs used in Zen 2 through Zen 5 . In dual-CCD configurations, flagship SKUs will offer up to 24 cores and 48 threads .
• SKU Configurations: The lineup is expected to span seven tiers, starting with single-CCD models at 6, 8, 10, and 12 cores, and scaling to dual-CCD parts at 16 (8+8), 20 (10+10), and 24 (12+12) cores. X3D variants with 3D V-Cache are also expected to continue, with rumored combined cache totals reaching up to 288MB .
• Cache: Each CCD carries 48MB of L3 cache, up from 32MB on Zen 5 .

Platform Enhancements: CUDIMM, EXPO, and Wi-Fi 7

Olympic Ridge retains the AM5 socket but upgrades the memory and connectivity ecosystem beneath it.

• Memory: The chips natively support dual-channel DDR5-8000 and offer full compatibility with CUDIMM memory via EXPO 1.2 profiles. This is a significant improvement over current AM5 implementations, which only allow partial CUDIMM support .
• Connectivity: Wi-Fi 7 support is expected at the platform level, paired with a new 800-series chipset. However, a native USB4 controller is still absent from the processor, meaning motherboard vendors will continue to use external controller chips .

Launch Timeline and Competitive Landscape

Following an official delay confirmed by AMD in early 2026, Olympic Ridge is now firmly a 2027 product . The unveiling is widely anticipated to take place at CES 2027 in January, with a retail launch in the first half of the year . This timeline sets up a direct generational battle with Intel's Nova Lake-S desktop platform, also expected in the same window .

The Strategic Play: Copilot+ Readiness

The decision to remove the iGPU is inseparable from Microsoft's Copilot+ PC initiative. The Copilot+ specification demands an NPU capable of at least 40 trillion operations per second (TOPS) to run advanced on-device AI features . Previous leaked roadmaps indicate that AMD's Zen 6 mobile counterpart, codenamed Gator Range, will surpass that threshold. Because Olympic Ridge descends from the same architecture, it is expected to meet or exceed the 40 TOPS requirement as well, bringing Copilot+ certification to mainstream AM5 desktops for the first time .

In an exclusive statement to Wccftech, AMD acknowledged that removing the iGPU would be necessary to maintain competitive pricing while complying with Microsoft's requirements, though the company has not explicitly confirmed the final designs .

This positions AMD to offer universal AI acceleration across its entire desktop stack, potentially pressuring Intel to follow suit with Nova Lake-S. The risk is that PC builders who value the iGPU as a troubleshooting tool or for non-gaming office builds may find the trade-off harder to accept.

Important Caveat: All information in this article is based on a single unverified leak from X user Gotou_kai3, published on June 15–16, 2026. AMD has not officially confirmed any of these specifications, and final product details may change .

The Core Trade-Off: Why Remove the iGPU?

The logic is one of silicon economics. The tiny 2-CU Radeon 710M iGPU found on current AM5 Ryzen processors is not a gaming solution; it serves primarily as a convenience for BIOS access, basic display output, and troubleshooting. By eliminating it, AMD frees up critical physical area on the I/O die to accommodate a new NPU without inflating manufacturing costs .

The Immediate Consequence: Every desktop built around a Ryzen "Olympic Ridge" CPU will mandate a discrete graphics card. Even tasks as simple as navigating the UEFI, installing an operating system, or diagnosing a faulty GPU will require a working dedicated video card in the system . For system builders and IT departments who rely on the iGPU as a fail-safe, this represents a meaningful reduction in system flexibility.

Architecture and Specifications: A Major Chiplet Overhaul

The Zen 6 architecture reportedly marks its biggest chiplet revamp since Zen 2. The move to advanced TSMC nodes allows a dramatic increase in core density while keeping die sizes in check.

• Manufacturing Process: The Core Compute Dies (CCDs) will use TSMC's cutting-edge N2P (2nm-class) process, while the I/O Die will be built on the N3P (3nm) node . The new CCD measures roughly 76mm², staying comparable to Zen 5 in physical size despite the transistor density leap .
• CPU Cores: Each CCD now packs up to 12 Zen 6 cores, a 50% jump from the 8-core CCDs used in Zen 2 through Zen 5 . In dual-CCD configurations, flagship SKUs will offer up to 24 cores and 48 threads .
• SKU Configurations: The lineup is expected to span seven tiers, starting with single-CCD models at 6, 8, 10, and 12 cores, and scaling to dual-CCD parts at 16 (8+8), 20 (10+10), and 24 (12+12) cores. X3D variants with 3D V-Cache are also expected to continue, with rumored combined cache totals reaching up to 288MB .
• Cache: Each CCD carries 48MB of L3 cache, up from 32MB on Zen 5 .

Platform Enhancements: CUDIMM, EXPO, and Wi-Fi 7

Olympic Ridge retains the AM5 socket but upgrades the memory and connectivity ecosystem beneath it.

• Memory: The chips natively support dual-channel DDR5-8000 and offer full compatibility with CUDIMM memory via EXPO 1.2 profiles. This is a significant improvement over current AM5 implementations, which only allow partial CUDIMM support .
• Connectivity: Wi-Fi 7 support is expected at the platform level, paired with a new 800-series chipset. However, a native USB4 controller is still absent from the processor, meaning motherboard vendors will continue to use external controller chips .

Launch Timeline and Competitive Landscape

Following an official delay confirmed by AMD in early 2026, Olympic Ridge is now firmly a 2027 product . The unveiling is widely anticipated to take place at CES 2027 in January, with a retail launch in the first half of the year . This timeline sets up a direct generational battle with Intel's Nova Lake-S desktop platform, also expected in the same window .

The Strategic Play: Copilot+ Readiness

The decision to remove the iGPU is inseparable from Microsoft's Copilot+ PC initiative. The Copilot+ specification demands an NPU capable of at least 40 trillion operations per second (TOPS) to run advanced on-device AI features . Previous leaked roadmaps indicate that AMD's Zen 6 mobile counterpart, codenamed Gator Range, will surpass that threshold. Because Olympic Ridge descends from the same architecture, it is expected to meet or exceed the 40 TOPS requirement as well, bringing Copilot+ certification to mainstream AM5 desktops for the first time .

In an exclusive statement to Wccftech, AMD acknowledged that removing the iGPU would be necessary to maintain competitive pricing while complying with Microsoft's requirements, though the company has not explicitly confirmed the final designs .

This positions AMD to offer universal AI acceleration across its entire desktop stack, potentially pressuring Intel to follow suit with Nova Lake-S. The risk is that PC builders who value the iGPU as a troubleshooting tool or for non-gaming office builds may find the trade-off harder to accept.