Intel's 18A-P Hits a Critical Milestone, Teeing Up a Showdown With TSMC

These improvements aren't the result of a conventional process shrink. Instead, Intel achieved them through several key innovations:

• New Transistor Options and Tighter Variability Control: The company introduced additional logic threshold voltage (VT) pairs and tightened skew control, meaning chip performance is more uniform across a wafer. New low-power and high-performance device libraries were also added for both high-density and high-performance cell heights .
• Power Boost Technology: A new “Power Boost” transistor option introduces a dual-contact, low-resistance structure. This allows for a higher drive current and operating frequency at a matched capacitance, directly translating to better speed without a proportional increase in power .

Fixing the Heat Problem with PowerVia

One of the most notable improvements might be in thermal management, a critical concern for high-performance computing. 18A-P builds on Intel’s PowerVia backside power delivery (BSPD), which it first commercialized with the 18A node . For 18A-P, materials and design innovations have led to a 20–40% reduction in thermal resistance and a 10–30% improvement in via resistance . The result is a chip that not only runs faster and uses less power but is also significantly easier to cool—a vital attribute for dense data center and AI workloads.

The Killer Feature: No Redesign Required

For a foundry business trying to win over skeptical customers, 18A-P’s greatest selling point may be its practicality. Intel confirmed that 18A-P is fully design-rule compatible with the baseline 18A process . This is a strategic masterstroke. A customer who has already invested in a chip design for 18A—or even one who started developing for it—can transition to the performance-enhanced 18A-P without a ground-up redesign. They can simply recompile their existing physical design and immediately benefit from the performance, power, and thermal gains .

This compatibility dramatically lowers the risk and cost of adoption, turning 18A-P into a drop-in upgrade rather than a new platform commitment .

The Apple Question: From Rumor to Reality

The on-schedule entry into risk production is a direct signal to the market that Intel Foundry can be trusted as a reliable, long-term manufacturing partner. This credibility is at the heart of the most tantalizing storyline around 18A-P: a potential deal with Apple.

Multiple reports and analyst notes have pointed to Apple actively evaluating Intel’s 18A process for its entry-level M-series chips. Ming-Chi Kuo reported that Apple had received a 0.9.1 version of the 18A-P Process Design Kit (PDK) and that internal simulations were encouraging enough to wait for the final 1.0 release . KeyBanc analyst John Vinh stated his checks indicated Intel Foundry had “landed Apple as a customer on 18A for low-end M-series processors for MacBooks and iPads,” with production expected in 2027 . The design-rule compatibility means Apple could begin with lower-risk 18A designs and seamlessly migrate to higher-yielding, higher-performance 18A-P production wafers for the final product .

Beyond Apple, Google is reportedly exploring Intel’s advanced packaging technology for its next-generation TPU v8e AI accelerator, signaling broader interest in Intel’s manufacturing ecosystem .

Beyond 18A-P: The Long-Term Research Pipeline

Intel used the VLSI Symposium to make clear that 18A-P is just one stop on a much longer roadmap. In an invited talk, Intel Fellow Eric Karl detailed how the combination of RibbonFET gate-all-around (GAA) transistors and PowerVia BSPD provides a scalable foundation for future logic nodes. The presentation quantified advantages including an 11% routed area reduction and a 10x reduction in dynamic voltage droop, which can enable up to a 6% frequency uplift .

Looking further out, Intel also shared new research on Complementary FET (CFET) devices—a next-generation transistor architecture that vertically stacks NMOS and PMOS transistors to dramatically increase density. The data showed prototypes with a 45nm gate pitch, PowerVia integration, and direct backside contacts, all of which are building blocks for a post-2nm era .

For Intel Foundry, 18A-P is now the most tangible evidence yet that it can execute on an advanced roadmap, deliver measurable performance gains, and speak the language that external customers care about most: a simple, low-risk path to a better chip. Whether that translates into signed contracts with the industry’s biggest names will be the story of the next 12 months.