Nvidia Feynman AI Chip: TSMC A16 Process, CoPoS Packaging, and 2028 Mass Production Timeline

Advanced Packaging: SoIC, CoPoS, and CPO

Feynman will combine three advanced packaging technologies simultaneously:

• SoIC (System-on-Integrated-Chips) — TSMC's hybrid bonding technology for 3D stacking of chiplets and memory. This is a key enabler for Feynman's high-bandwidth design .
• CoPoS (Chip-on-Panel-on-Substrate) — TSMC's next-generation packaging that replaces round wafers with large rectangular panels, targeting ultra-large packages exceeding 9.5× reticle size. Analyst Ming-Chi Kuo states CoPoS is slated for mass production in 2H 2028, and Feynman is expected to be the first customer .
• Co-packaged optics (CPO) — Feynman GPUs are designed to integrate silicon photonics directly onto the GPU package, transitioning scale-up from copper backplanes to native optical interconnect .

TSMC's Capacity Ramp: SoIC, CoWoS, and New Plants

To support Feynman and other high-volume customers, TSMC is aggressively expanding its advanced packaging capacity:

SoIC capacity: Industry projections estimate SoIC output could reach approximately 65,000 wafers per month (wfpm) by 2028 to align with mass adoption in AI accelerators . Other estimates project SoIC reaching 14,000 wfpm by end-2026 and 28,000 wfpm by end-2027 .

CoWoS capacity: TSMC is raising its CoWoS targets to between 115,000 and 140,000 wfpm by end-2026, and approximately 170,000 to 190,000 wfpm by 2027 . JPMorgan channel checks project CoWoS reaching 220,000–225,000 wfpm by end-2028 . TSMC's CoWoS capacity has been growing at an 80% CAGR between 2022 and 2027 .

New facilities: TSMC's advanced packaging plants AP7 in Chiayi and AP8 in Tainan are reportedly ahead of schedule, with construction accelerating . Two factories from one of these parks' first phases have already entered mass production as of June 2026 . AP7 is described as TSMC's biggest advanced packaging campus, with multiple phases planned to support SoIC and CoPoS . AP8 focuses on CoWoS and is expected to eventually house monthly capacity exceeding 40,000 wafers .

Nvidia Spectrum-X Ethernet Photonics CPO Switches: In Production Now

While Feynman is still two years away, Nvidia's co-packaged optics technology has already entered mass production in the form of Spectrum-X Ethernet Photonics switches:

• May 2026: Nvidia announced the Vera Rubin platform, introducing Spectrum-X Ethernet Photonics as "now in production" .
• June 2026: Nvidia confirmed full mass production of the switches, built on Spectrum-6 switching silicon with co-packaged optics .
• July 2026: TrendForce reported Nvidia had begun volume shipments of Spectrum-X CPO switches to select partners .
• August 14, 2026: Nvidia officially declared Spectrum-X Ethernet Photonics had entered full mass production, calling it the "world's first 200G/lane CPO Ethernet switch system in production," built with Hon Hai, Lumentum, SPIL, TFC, and TSMC .

Performance claims for the switches include 4× fewer lasers, 5× lower power consumption, 10× better mean time between failures, and up to 70% power savings versus conventional pluggable optics .

Broader AI Supply Chain Implications

Nvidia's roadmap is increasingly dictating TSMC's capital expenditure cycle across several dimensions:

• Process node lockstep: Nvidia is the lead customer for TSMC's most advanced nodes — Blackwell on 4nm, Rubin on 3nm, Feynman on A16 (1.6nm) — meaning every new Nvidia generation pulls TSMC's next node ramp forward .
• Packaging as the bottleneck: With Feynman requiring SoIC, CoPoS, and CPO simultaneously, TSMC's capacity planning for advanced packaging is increasingly driven by Nvidia's product cadence rather than general foundry demand .
• CPO inflection now: The Spectrum-X CPO ramp in 2026–2027 serves as a real-world production test for TSMC's COUPE silicon photonics platform — exactly the technology Feynman will rely on at scale .
• Facility acceleration: TSMC is pulling forward construction at AP7 (Chiayi) and AP8 (Tainan) specifically to meet Nvidia's 2028 Feynman timeline .
• Capex cycle tightening: TSMC's multi-year N2/A16 capacity expansion, aiming for ~90,000 WSPM by end-2026 with 70% year-over-year growth, is increasingly synchronized to Nvidia's two-year GPU architecture cadence .

Key uncertainty: Some reports mention Feynman may also use Intel's advanced packaging or glass substrates, which would complicate the exclusive TSMC-Nvidia relationship. This remains unconfirmed by primary sources .