FMS 2026: Kioxia, Sandisk, and SK hynix Unveil Record-Breaking QLC NAND and First Open High Bandwidth Flash Spec

Key Specifications

• Bit density: >37 Gb/mm² — a ~60% increase over their 8th-generation technology .
• Layer count: 332 active layers .
• Interface: 4.8 Gb/s via Toggle DDR6.0 .
• Key innovation: CMOS Directly Bonded to Array (CBA) technology, which fabricates CMOS logic and the memory array on separate wafers before bonding them together. This approach improves power efficiency and enables the density leap .

The device was formally introduced during a live demonstration at the conference . Earlier, in July 2026, Sandisk and Kioxia had already begun sampling BiCS10 1Tb TLC NAND, a tri-level-cell variant with a density greater than 29 Gb/mm² . The QLC variant demonstrated at FMS represents a further density step, leveraging the four-bit-per-cell architecture.

Sandisk & SK hynix — First High Bandwidth Flash (HBF) OCP Specification

Sandisk and SK hynix released the first standard technical specification for High Bandwidth Flash (HBF) through the Open Compute Project (OCP) . The specification defines a new memory tier positioned between HBM and conventional SSDs, specifically optimized for AI inference workloads where large models require more memory than HBM can economically provide.

Key Specifications

• Capacity per stack: Up to 512 GB using 8-high and 16-high NAND stack configurations .
• Target bandwidth: Up to 3.0 TB/s (1.6 TB/s per direction), with three performance grades (Grade 1–3) spanning roughly 0.4 TB/s to 3.0 TB/s .
• Connection standard: UCIe (Universal Chiplet Interconnect Express) .
• Consortium members: Google (DeepMind) and Tenstorrent joined the HBF workstream during the standardization process .

Strategic Positioning

HBF is designed to bridge the speed-capacity gap between HBM (fast but limited capacity) and conventional SSDs (large but slower) . Sandisk has stated that HBF can deliver 8–16x the capacity of HBM at a similar cost, and simulated performance on a Llama 3.1 405B parameter model showed within a 2.2% delta of a hypothetically unlimited-capacity HBM configuration .

Availability Timeline

The open standard is published now. Memory samples are expected in late 2026, with commercial devices anticipated in early 2027 .

FMS 2026 Sessions — Keynote & Panel

Sandisk Keynote: "NAND: The Versatile & Scalable Foundation of the AI Era"

Scheduled for Wednesday, August 5, 2026 at 11:40 a.m. PT in the Mission City Ballroom at the Santa Clara Convention Center. The keynote, presented by Sandisk's Jim Elliott (CRO), Khurram Ismail (CPO), and Alper Ilkbahar (CTO), covers system-level optimization and NAND's role in enabling AI inference at scale .

SK hynix Keynote: "Orchestrating Efficient AI Infrastructure through Tiered Memory in the Era of Agentic AI"

Delivered on opening day (August 4) by Executive Vice President Kim Chun-sung and Vice President Kang Uk-song, this session addressed tiered memory solutions for AI infrastructure .

Joint Panel: "Breaking the Memory Wall with High Bandwidth Flash"

A panel discussion on August 6 at 9:45 a.m. PT featuring Sandisk Vice President Rajeev Nagabhirava, SK hynix Vice President Lim Eui-cheol, and Google DeepMind Senior Staff Engineer Xiaoyu Ma. The session addresses how HBF tackles the compute-memory gap for AI inference workloads .

Note: The panel title is confirmed by multiple official sources, including Sandisk's press materials and SK hynix's newsroom. The exact full panel description is best confirmed via the live FMS 2026 agenda, but a dedicated "Breaking the Memory Wall" panel session is consistently listed in official coverage .

Why This Matters for AI Infrastructure

These announcements address two fundamental challenges in AI infrastructure: storage density and memory bandwidth. The BiCS10 QLC NAND enables denser, more power-efficient SSDs for training data lakes and high-capacity storage tiers. Meanwhile, HBF represents an entirely new memory class that could significantly reduce inference latency and cost by providing fast, high-capacity memory close to the accelerator, without the expense of expanding HBM.

The open-standard approach through OCP, with backing from Google and Tenstorrent, signals broad industry intent to standardize this new tier rather than fragment into proprietary solutions .