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AMD EPYC 9006 “Venice”: Everything Announced at Advancing AI 2026
AMD announced the 6th gen EPYC 9006 'Venice' server CPU family at its Advancing AI 2026 keynote on July 22–23, built on Zen 6/Zen 6c cores and TSMC's 2nm process, with a flagship model offering up to 256 Zen 6c cores... AMD detailed four variants: SP7 (Q4 2026, high density), SP8 (H1 2027, mainstream), Venice X (H2...
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At its Advancing AI 2026 keynote in San Francisco on July 22–23, 2026, AMD officially unveiled the 6th-generation EPYC 9006 server processor family, codenamed "Venice." The announcement covered everything from the underlying process node and architecture to four distinct variants, aggressive performance claims against both Nvidia and AMD's own previous generation, and the chip's role as the CPU backbone of the new Helios rack-scale AI system — which is already shipping to Microsoft and other hyperscalers. Here is what was announced, backed by official sources and industry reporting.
Process Node & Architecture
The EPYC 9006 "Venice" family is the first x86 server CPU to reach volume production on TSMC's 2nm process node . It is built on two core architectures: Zen 6 (standard, high-frequency cores) and Zen 6c (compact, density-optimized cores)
. The flagship model integrates approximately , with the compute chiplets on the 2nm node and the I/O die on a 6nm node .
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What is the short answer to "AMD EPYC 9006 “Venice”: Everything Announced at Advancing AI 2026"?
AMD announced the 6th gen EPYC 9006 'Venice' server CPU family at its Advancing AI 2026 keynote on July 22–23, built on Zen 6/Zen 6c cores and TSMC's 2nm process, with a flagship model offering up to 256 Zen 6c cores...
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AMD announced the 6th gen EPYC 9006 'Venice' server CPU family at its Advancing AI 2026 keynote on July 22–23, built on Zen 6/Zen 6c cores and TSMC's 2nm process, with a flagship model offering up to 256 Zen 6c cores... AMD detailed four variants: SP7 (Q4 2026, high density), SP8 (H1 2027, mainstream), Venice X (H2 2027, 3D V Cache), and LP/Verano (H2 2027, low power).
What should I do next in practice?
The Helios rack delivers 2.9 EFLOPS (FP4) per rack and uses 18 Venice CPUs and 72 MI455X GPUs, with Microsoft deploying it in Azure starting H2 2026.
Sources
- amd.comAgentic AI: AMD EPYC™ 9005 CPUs Wins Today, EPYC 9006, formerly code-named “Venice”, Takes It to a New Level
- investing.comAMD at Advancing AI 2026 keynote: a bigger bet on scale
- biz.chosun.comAMD launches 2nm Epyc Venice, touts 2.2x throughput over Nvidia Vera
- 163.comAMD发布第六代EPYC Venice CPU：台积电2nm工艺
- tweaktown.comAMD announces 6th Gen AMD EPYC 'Venice' CPUs, up to 256 cores and 512 threads and built for AI