TSMC Chiayi: Inside the $6.5B Bet to Break the AI Chip Packaging Bottleneck

What TSMC is doing to address the advanced-packaging shortage

TSMC's strategy to close the packaging gap has five main pillars:

1. Quadrupling CoWoS output. TSMC is scaling CoWoS (Chip-on-Wafer-on-Substrate) production from roughly 35,000 wafers per month in late 2024 to a projected 130,000 wafers per month by the end of 2026 — a nearly 4× increase in two years . The company is also raising its CoWoS capacity targets for 2026–2027 and re-evaluating its broader advanced-packaging plans .

2. Still falling short of demand. Even with that surge, TSMC CEO C.C. Wei acknowledged in June 2026 that CoWoS capacity remains "extremely tight" and is sold out through 2025 and into 2026 . Analyst Handel Jones of International Business Strategies estimates CoWoS production is about 30% below demand, and TSMC accounts for roughly 95% of all advanced packaging . Kevin Zhang, a TSMC senior vice president, told the New York Times: "All I see is demand continuing to go higher and higher. It is certainly going to cause a lot of constraints" . Nvidia alone has reportedly booked 800,000–850,000 CoWoS wafers for 2026, representing about 60% of global demand and leaving less than 15% for competitors and startups .

3. Investing across multiple sites. Beyond Chiayi, TSMC is expanding advanced packaging at fabs in Zhunan (AP6B), Taichung, and Tainan . Advanced-packaging capital expenditure is projected to grow at a 24% CAGR from 2025 through 2027 . TSMC's overall capital spending spree is expected to carry through 2028 as it tries to solve chip supply bottlenecks .

4. Developing next-generation packaging. TSMC is piloting CoPoS (Chip-on-Panel-on-Substrate) panel-level packaging, with a pilot line on track for completion by June 2026 and potential production ramp in 2028–2029 . Chiayi is expected to host the first CoPoS pilot line . The site is also planned for WMCM (Wafer-Level Multi-Chip Module) and SoIC (System-on-Integrated-Chips) technologies .

5. Broad industry acknowledgment. The severity of the bottleneck goes beyond TSMC's own warnings. Broadcom publicly flagged in March 2026 that TSMC's advanced-node capacity falls roughly three times short of what major customers plan to consume . An analyst at Georgetown University's Center for Security and Emerging Technology noted that advanced packaging "can quickly turn into a bottleneck if proactive capital expenditures are not made" .

Key details of the Chiayi Science Park expansion

The Chiayi Science Park — once rice fields — is being transformed into TSMC's primary hub for next-generation advanced packaging. Here are the critical details:

When will the bottleneck really ease?

The honest answer is: not soon. While Phase I plants are nearing production, Phase II facilities won't fully ramp until around 2031 . TSMC CEO C.C. Wei described demand growth in 2026 as "insane" and told shareholders that the company won't be able to fulfill demand even as manufacturing capacity comes online in the US over the next few years . Advanced-node capacity is reportedly sold out through at least 2027, with demand running roughly 25 to 30% above capacity . For anyone buying AI silicon or devices built on it, the takeaway is concrete: supply stays scarce into 2027, and the cost of leading-edge chips is going up .