Citi analysts expressed surprise at the early unveiling of the Vera Rubin platform at CES 2026. They stated there is upside to $500 billion in AI demand from the Blackwell/Rubin roadmap .
Nvidia designed Vera from the ground up for AI factories. Key specifications from Nvidia's developer blog and detailed hardware analyses :
| Specification | Detail |
|---|---|
| Cores | 88 custom Nvidia Olympus cores |
| Threads | 176 (via Nvidia Spatial Multithreading, physical resource partitioning) |
| ISA | Arm v9.2 |
| Instruction Decode Width | 10-wide |
| Branch Predictor | Neural; 2 taken branches per cycle |
| L2 Cache (per core) | 2 MB |
| L3 Cache (total) | 164 MB |
| Memory | LPDDR5X (SOCAMM2 modules), up to 1.2 TB/s bandwidth |
| Memory Power | <30 W (vs. >100 W for traditional DDR5) |
| Interconnect | PCIe Gen 6, CXL 3.1 |
| TDP | 450 W (single-socket pre-production system) |
| Process Node | TSMC 3nm (N3) |
| Die Design | Single monolithic die with all 88 cores, no NUMA eccentricities |
| FP8 Support | Native FP8 precision for AI workloads |
Nvidia also states that Vera delivers up to 50% faster sandbox performance versus competitive platforms and 80% faster sandbox environment performance than traditional CPU infrastructure . CEO Jensen Huang highlighted the new Vera chip, targeting a $200 billion market .
The first widely reported independent benchmarks came from Phoronix on May 26, 2026, testing a single-socket Vera system at Nvidia's Santa Clara headquarters . These were Nvidia-hosted, curated tests, meaning results may not fully generalize to all third-party workloads .
Key results from the Phoronix geometric mean:
Independent validation from Redpanda: In their own benchmarks comparing Vera against five other systems, Redpanda found Vera delivered the lowest streaming latencies across the board, the best interconnect scaling, and the fastest build times with up to 73% higher throughput than AMD EPYC “Turin” .
Caveat: As Tom's Hardware noted, these were curated tests at Nvidia's Santa Clara facility, so results may not generalize to all workloads .
Rosa is the confirmed follow-up to Vera, named after Nobel Prize-winning medical physicist Rosalyn Sussman Yalow. It belongs to the Feynman generation and is expected in 2028 .
Confirmed from Nvidia:
Rumored/Reported (not officially confirmed by Nvidia):
Summary: Rosa is a same-die-area performance-per-core upgrade over Vera's Olympus core, built on Arm v9.2 Rigel architecture, launching in 2028 as part of the Feynman platform. Process node details (2nm vs A16) are still speculative.
Citi analysts expressed surprise at the early unveiling of the Vera Rubin platform at CES 2026. They stated there is upside to $500 billion in AI demand from the Blackwell/Rubin roadmap .
Nvidia designed Vera from the ground up for AI factories. Key specifications from Nvidia's developer blog and detailed hardware analyses :
| Specification | Detail |
|---|---|
| Cores | 88 custom Nvidia Olympus cores |
| Threads | 176 (via Nvidia Spatial Multithreading, physical resource partitioning) |
| ISA | Arm v9.2 |
| Instruction Decode Width | 10-wide |
| Branch Predictor | Neural; 2 taken branches per cycle |
| L2 Cache (per core) | 2 MB |
| L3 Cache (total) | 164 MB |
| Memory | LPDDR5X (SOCAMM2 modules), up to 1.2 TB/s bandwidth |
| Memory Power | <30 W (vs. >100 W for traditional DDR5) |
| Interconnect | PCIe Gen 6, CXL 3.1 |
| TDP | 450 W (single-socket pre-production system) |
| Process Node | TSMC 3nm (N3) |
| Die Design | Single monolithic die with all 88 cores, no NUMA eccentricities |
| FP8 Support | Native FP8 precision for AI workloads |
Nvidia also states that Vera delivers up to 50% faster sandbox performance versus competitive platforms and 80% faster sandbox environment performance than traditional CPU infrastructure . CEO Jensen Huang highlighted the new Vera chip, targeting a $200 billion market .
The first widely reported independent benchmarks came from Phoronix on May 26, 2026, testing a single-socket Vera system at Nvidia's Santa Clara headquarters . These were Nvidia-hosted, curated tests, meaning results may not fully generalize to all third-party workloads .
Key results from the Phoronix geometric mean:
Independent validation from Redpanda: In their own benchmarks comparing Vera against five other systems, Redpanda found Vera delivered the lowest streaming latencies across the board, the best interconnect scaling, and the fastest build times with up to 73% higher throughput than AMD EPYC “Turin” .
Caveat: As Tom's Hardware noted, these were curated tests at Nvidia's Santa Clara facility, so results may not generalize to all workloads .
Rosa is the confirmed follow-up to Vera, named after Nobel Prize-winning medical physicist Rosalyn Sussman Yalow. It belongs to the Feynman generation and is expected in 2028 .
Confirmed from Nvidia:
Rumored/Reported (not officially confirmed by Nvidia):
Summary: Rosa is a same-die-area performance-per-core upgrade over Vera's Olympus core, built on Arm v9.2 Rigel architecture, launching in 2028 as part of the Feynman platform. Process node details (2nm vs A16) are still speculative.