TSMC runs its fab scheduling and operations optimization workloads on NVIDIA H200 Tensor Core GPUs, using CUDA-X libraries to accelerate discrete optimization algorithms, reducing scheduling turnaround time and improving overall fab throughput .
| Workload Area | NVIDIA Technology | Key Improvement |
|---|---|---|
| Computational lithography | cuLitho | 20–50% cost/cycle time improvement |
| Transistor/material simulation | cuEST | 50x faster chemistry simulations |
| Process control / variation reduction | cuML | Faster analytics on hundreds of thousands of process parameters |
| Fab scheduling & optimization | H200 GPUs + CUDA-X | Accelerated discrete optimization algorithms |
| Defect inspection | Metropolis + TAO Toolkit | Improved nanometer-scale defect detection |
| Digital twin / fab simulation | Omniverse (FabTwin) | Virtual fab planning and optimization |
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