Inside NVIDIA's Vera CPU: Performance, Architecture, and a $200 Billion Market Play

NVIDIA's new Vera CPU has achieved a clean sweep in all the early benchmark data released to the public. Tests from Phoronix and Redpanda show it outperforming the latest AMD EPYC Turin and Intel Xeon Granite Rapids processors. The headline numbers are striking: up to 5.5x lower latency in streaming workloads and a 73% throughput advantage over AMD's Turin chips . But the fine print is just as important. While the tests were executed by independent reviewers, NVIDIA dictated the workloads, and crucial metrics—like standard SPEC CPU, STREAM, and MLPerf results—remain unpublished .

This is the story of a chip that wins on the battlefield its maker chose, as it waits to be tested on the open field.

Early Benchmarks: A Clean Sweep, With Caveats

The available data, though narrow, is consistent. Vera wins against its x86 rivals in every scenario that has been made public.

• General Compute (Phoronix): In May 2026 tests run by Phoronix, the Vera CPU outperformed both single and dual-socket Intel Xeon Granite Rapids 6980P and AMD EPYC Turin/Turin Dense systems across all allowed configurations. NVIDIA defined which workloads could be assessed, which included code compilation, Python performance, and Java benchmarks .
• Streaming Data (Redpanda): A benchmark by the streaming data platform Redpanda found Vera delivered up to 5.5x lower latency and up to 73% higher throughput on Kafka-compatible workloads compared to AMD EPYC Turin, AMD EPYC Genoa, and Intel Xeon 6 . It also showed better scaling in core-to-core communication, continuing to improve beyond 32 cores where x86 rivals plateaued .
• AI Agent Orchestration (NVIDIA's Claims): NVIDIA's own 'Agentic Sandbox' benchmark claims a 1.5x performance lead over unnamed x86 competitors, a 2x gain over its own previous Grace CPU, and 50% faster rack-level performance than traditional infrastructure .

These results are promising, but incomplete. The absence of process node, clock frequencies, TDP, and public pricing data adds further uncertainty to any direct cost-performance comparison .

The Architecture Behind the Gains

Vera is not a general-purpose processor adapting to new workloads. It is a chip engineered with radical focus, and every major design decision flows from a single requirement: keeping NVIDIA's Rubin GPUs fed with data at 22 TB/s . This constraint has produced an architecture that systematically addresses the bottlenecks of legacy server design.

The Olympus Core: A Custom-First Approach

Vera marks NVIDIA's first fully custom data center CPU core. The 88 Olympus cores are built on the Armv9.2 instruction set and feature a 10-wide instruction fetch and decode frontend with a neural branch predictor, enabling a claimed 1.5x IPC (instructions per clock) improvement over previous designs .

Each physical core supports two threads via NVIDIA Spatial Multithreading, providing a total of 176 hardware threads per socket without the inconsistent performance often seen in symmetric multi-threading .

Memory Bandwidth: Breaking the Per-Core Starvation Model

This is Vera's defining advantage. The chip delivers 1.2 TB/s of LPDDR5X memory bandwidth across a 1,024-bit interface and eight SOCAMM modules . This translates to roughly 14 GB/s per core, which is about 3x the per-core bandwidth of traditional data center CPUs from AMD and Intel . For comparison, AMD's top EPYC 9965 offers roughly 614 GB/s per socket total bandwidth, and Intel's Granite Rapids sits lower still with 8-channel DDR5 .

Monolithic Die: Saying Goodbye to NUMA

AMD and Intel's high-core-count server chips use multi-chiplet designs that introduce Non-Uniform Memory Access (NUMA) latency penalties. Vera sidesteps this entirely with a single monolithic compute die, with no chiplet interconnects . This provides deterministic, low-latency memory access across the entire socket, a critical feature for consistent performance when a single rack of 256 Vera CPUs is tasked with running 22,500+ concurrent environments .

Market Impact: From Hand-Deliveries to a $200B Ambition

NVIDIA is treating the Vera CPU not as a side project but as a top-line corporate priority with hard numbers to back it up.

Early Customer Shipments

In a symbolic rollout in May 2026, NVIDIA VP Ian Buck personally hand-delivered the first Vera CPU systems to Anthropic, OpenAI, SpaceXAI, and Oracle Cloud Infrastructure (OCI) . This tight anchor-customer launch strategy places the chip immediately in the hands of the leading AI labs.

Cloud Deployment

Oracle Cloud Infrastructure is the most aggressive early public adopter, signaling plans to deploy hundreds of thousands of Vera CPUs beginning in 2026 . The integrated Vera Rubin NVL72 rack, combining Vera CPUs with Rubin GPUs, is scheduled for volume operation in the second half of 2026 .

Revenue and the $200B Market

On NVIDIA's Q1 FY2027 earnings call, which reported revenue of $81.6 billion and guided Q2 to $91 billion, CFO Colette Kress disclosed $20 billion in "visibility" for standalone Vera CPU sales in 2026 . CEO Jensen Huang framed it as "a brand new $200 billion total addressable market" that NVIDIA has not previously addressed, going so far as to predict Vera will be the company's "second largest" sales contributor behind the Blackwell and Rubin GPU families .

Vera is not being positioned as a generic server chip. NVIDIA is selling it as the orchestrator for the agentic AI era—the CPU that handles reinforcement learning loops, coordinates thousands of concurrent AI agents, and manages the data torrent flowing to GPUs . It's an audacious move to capture a space that x86 incumbents have historically owned without challenge.