Xiaomi’s XRING O3 reportedly reaches about 15,000 Geekbench multi core points, but only above 20W on an engineering board. The chip uses 10 Arm C1 family cores: 2 C1 Ultra, 4 C1 Premium and 4 C1 Pro, with no small efficiency cores.
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Create a landscape editorial hero image for this Studio Global article: How does Xiaomi’s engineering-sample/dev-board SoC—whose cooling is undisclosed and whose results should therefore be treated cautiously—ach. Article summary: The reported XRING O3 result is best read as evidence of unusually strong SoC implementation—not proof that Xiaomi has created a fundamentally superior CPU core. Its C1-Ultra, C1-Premium, and C1-Pro are Arm CPU IP on TSM. Topic tags: general, general web, user generated. Style: premium digital editorial illustration, source-backed research mood, clean composition, high detail, modern web publication hero. Use reference image context only for broad subject, composition, and topical grounding; do not copy the exact image. Avoid: logos, brand marks, copyrighted characters, real person likenesses, fake screenshots, UI text, readable text, watermarks, charts with fa
Early testing makes Xiaomi’s XRING O3 look like an unusually strong mobile SoC. Reports based on an engineering board put it near the top of Android efficiency testing and close to Apple’s A19 Pro in some workloads. 17 But the headline result needs a firm qualification: the board reportedly exceeded 20W under full CPU load, and its cooling and power configuration are not fully disclosed. 1920
The most defensible conclusion is that Xiaomi has extracted more from familiar Arm CPU IP through system design and implementation. The evidence does not yet prove that Xiaomi created a fundamentally superior CPU core—or that a retail phone will sustain the same performance.
The XRING O3 uses Arm C1-Ultra, C1-Premium and C1-Pro CPU designs manufactured on TSMC’s N3P process. 34 MediaTek’s Dimensity 9500 also uses the C1 family, making the comparison especially revealing: if two chips use the same broad CPU generation and process class but produce different results, the gap can come from how the vendor implements the design.
That implementation includes choices such as cache capacity, memory bandwidth, interconnect behavior, voltage-frequency curves, physical layout, power delivery and software scheduling. These factors affect how quickly a core reaches a given performance level and how much energy it consumes while doing so. The available evidence supports implementation as the leading explanation, but it does not identify which individual design choice accounts for the reported advantage. 1723
Geekerwan’s reported testing places the XRING O3’s C1-Ultra efficiency curve ahead of the Android SoCs in its test set and close to Apple’s A19 Pro prime core. 17 The result is striking because it comes from a core family that is not exclusive to Xiaomi.
The likely lesson is not that clock speed alone has changed the equation. Xiaomi can instead be using a more favorable voltage and frequency policy, a stronger cache and memory subsystem, or a physical implementation that reaches the same workload target with less wasted power. Floating-point workloads are particularly relevant here because reported results show the O3 gaining more strongly against competing chips in tests that depend heavily on memory and cache behavior. 17
That still does not make the comparison absolute. Efficiency varies by workload, operating point, firmware and measurement method. A single development-board curve cannot establish a universal performance-per-watt ranking.
At full CPU load, the development board reportedly reached roughly 15,000 Geekbench multi-core points while drawing more than 20W. 1920 That helps explain how a 10-core all-big design can produce such a high burst result: the board can provide power and cooling that a thin smartphone cannot sustain.
At a lower power target, one report says the chip scored about 12,000 points while using roughly half the power of the Snapdragon 8 Elite Gen 5 at a similar performance level. 20 This is encouraging, but it remains an early comparison rather than a standardized retail-device measurement. The undisclosed cooling solution, firmware, voltage policy and test conditions all limit how confidently the result can be transferred to a phone or foldable.
The practical question is therefore not “Can the O3 reach 15,000 points?” It apparently can under the reported board conditions. The more important question is how long a commercial device can maintain a high-performance operating point before heat, battery limits or software policy reduce frequency.
The XRING O3’s CPU has two C1-Ultra cores running at up to 4.35GHz, four C1-Premium cores at up to 3.68GHz and four C1-Pro cores at up to 3.15GHz. All 10 are performance-oriented cores; the design does not include a separate cluster of genuinely low-power cores. 12
That is an aggressive “all-big-core” configuration. It gives the scheduler more capable workers for bursty tasks and multicore workloads, and it helps explain the chip’s strong benchmark ceiling. It also creates a harder battery-life and thermal-management problem during sustained or lightly threaded use, because even the lower tier is not designed as a traditional efficiency core.
Reported specifications also list a 16MB shared CPU L3 cache and a separate 16MB system-level cache. 311 Together, those caches can keep more working data close to the CPU and reduce trips to external memory, although cache size alone does not guarantee better performance: latency, associativity, interconnect design and software access patterns matter too.
Xiaomi’s C1-Pro cores and MediaTek’s C1-Pro cores should be treated as members of the same Arm core class, not as entirely different Xiaomi and MediaTek architectures. 1223 Their real-world behavior can still differ substantially because each company chooses its implementation, cache arrangement, power limits, memory system and frequency curve.
The C1-Pro is also difficult to label using familiar phone categories. Compared with Apple’s efficiency cores, it is better understood as a larger, higher-power middle-tier core rather than a conventional low-power core. Compared with the Snapdragon 8 Elite Gen 5’s Qualcomm Oryon performance cores, it may trade some peak single-thread speed for lower active power and better multicore density—but the supplied evidence does not provide enough like-for-like per-core measurements to assign exact rankings in watts or performance per watt. 1724
That is why clock speed is not a sufficient comparison. A 3.15GHz C1-Pro and a core from another vendor can deliver different work per cycle, reach different voltages at that frequency and spend different amounts of time waiting on memory.
The O3 is reported to support LPDDR6-10667 through a 96-bit interface, producing peak bandwidth of about 113.8GB/s. 210 The wider memory path matters because the SoC must feed 10 large CPU cores as well as its GPU and other accelerators.
More bandwidth does not automatically improve every CPU workload. It is most valuable when the workload is limited by data movement rather than arithmetic, and it can reduce contention between the CPU, GPU and NPU. Combined with the reported 16MB CPU L3 and 16MB SLC, the design suggests that Xiaomi is treating the memory hierarchy as a central performance feature rather than simply raising clocks. 31011
This is also a system-level advantage that can make a familiar CPU core appear much stronger in selected benchmarks. The trade-off is greater die area and potentially higher platform cost: the O3 is reported to occupy about 133mm² and contain roughly 24 billion transistors. 34
The reported GPU is a 16-core G2-Ultra NX design, divided between conventional GPU cores and NX-oriented cores for upscaling and frame-generation functions. 714 That points to a broader strategy: improve perceived game performance with specialized hardware instead of relying only on more conventional shader throughput.
This approach can be efficient when a game and its software stack support the relevant features. It is not equivalent to native rendering performance, however, and frame generation cannot remove every source of latency or image-quality compromise. The GPU claims therefore need the same caution as the CPU results until tested in shipping devices and a broad range of games.
The XRING O3’s early results show how much differentiation can remain after vendors adopt the same Arm CPU family and a similar leading-edge manufacturing process. Xiaomi appears to have combined an unusually wide all-big-core CPU, substantial cache, high memory bandwidth and aggressive power tuning into a design with a very high performance ceiling. 1317
That is meaningful progress for Xiaomi as a chip designer. But it is not yet evidence that the company broadly outperforms MediaTek, Qualcomm, Samsung, Google or Apple across battery life, sustained performance, modem efficiency, GPU drivers, imaging, software support, manufacturing yield and cost.
For now, the fairest verdict is narrower: XRING O3 is compelling evidence of excellent SoC implementation, while the 20W engineering-board result remains a demonstration of what the silicon can do under favorable conditions—not a guarantee of what a Xiaomi phone will deliver every day.
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Xiaomi’s XRING O3 reportedly reaches about 15,000 Geekbench multi core points, but only above 20W on an engineering board.
Xiaomi’s XRING O3 reportedly reaches about 15,000 Geekbench multi core points, but only above 20W on an engineering board. The chip uses 10 Arm C1 family cores: 2 C1 Ultra, 4 C1 Premium and 4 C1 Pro, with no small efficiency cores.
Its C1 Pro cores cannot yet be ranked precisely against Apple efficiency cores or Qualcomm performance cores because there is no complete, like for like per core power dataset.