How IBM’s Nighthawk r2 Reaches 100,000 Quantum Circuit Runs per Second

IBM’s Nighthawk r2 processor, available as ibm_phoenix, is designed around a practical bottleneck in superconducting quantum computing: waiting for qubits to return to a clean starting state after a circuit run. Rather than adding more user-programmable qubits, IBM has equipped its 120-qubit processor with hardware that actively resets every qubit. IBM reports that this raises maximum circuit throughput above 100,000 executions per second, roughly 25 times the throughput of its Heron fleet. 117

The bottleneck: qubit reset, not gate speed

Quantum programs usually require many repeated executions of the same circuit, often called shots, to estimate measurement probabilities and physical observables. After a run, a superconducting qubit may remain excited. If the system waits for ordinary relaxation, that recovery time can dominate the interval before the next run.

IBM says the prior default repetition delay was 250 microseconds. On Nighthawk r2, it is 1 microsecond. That change—not a 25-fold improvement in the speed of individual quantum gates—is the main reason the system can run more circuits per second. 17

The distinction matters: circuit throughput measures how quickly a workload can repeat executions and collect statistics. A 25× throughput figure does not automatically translate into a 25× speedup for every algorithm or into general-purpose quantum advantage.

How dissipative reset works

Nighthawk r2 replaces a reset strategy based on conditional reset and idle time with a dedicated dissipative-reset gadget for each programmable qubit. A high-dynamic-range tunable coupler temporarily connects the qubit to a cold environment, drawing its excitation away and returning it to the ground state on demand. 14

IBM reports that the median effective relaxation time, or T1, changes from about 200 microseconds when reset is inactive to about 25 nanoseconds when the reset is activated. The system-level delay between circuit executions is about 1 microsecond, leaving room for control, measurement, and other overhead beyond the physical reset itself. 317

In simple terms, IBM has turned reset from a period of waiting into an active hardware operation.

What is inside the 120-qubit processor?

Nighthawk r2 has 120 programmable superconducting qubits. Supporting them are 218 qubit-to-qubit couplers and 120 independent reset elements—one for each programmable qubit—for 458 physical quantum elements in total. 1112

IBM says the per-qubit approach has three important properties:

• Independent reset: a qubit can be reset without forcing all other qubits through the same process.
• Cleaner initialization: IBM reports about a 25-fold reduction in initialization error.
• Preserved gate quality: IBM reports layered gate errors of roughly 3 × 10⁻³, comparable with its Heron systems, and says reset activation does not disturb neighboring computational qubits. 315

These are vendor-reported performance results. They show that fast reset can coexist with IBM’s stated gate-quality level, but they are not an independent demonstration of fault tolerance.

Why fast reset can improve useful workload time

The largest gains should appear in workloads where repeated circuit runs, measurements, or dynamic control dominate the time budget. If a workload has to execute a circuit thousands or millions of times to estimate an observable, removing most of the post-run wait can materially reduce turnaround time.

IBM reports accurate observable estimation on circuits containing more than 7,500 gates. It also reports a 12× speedup for a neutron-scattering simulation, producing spectra comparable with laboratory data in about 60 seconds. Those results are useful evidence that higher throughput can shorten a specific workload, but they should not be treated as a universal 12× or 25× application-speed claim. 20

Why mid-circuit reset matters for error correction

Fast reset is also important within a circuit, not only between circuit executions. Quantum error-correction schemes repeatedly measure ancillary qubits—often called check or syndrome qubits—to identify errors affecting data qubits. Those ancillas then need to be reset before the next measurement cycle.

With mid-circuit measurement and reset, an ancilla can be measured, reinitialized, and reused instead of waiting for passive relaxation. That capability supports dynamic circuits and reduces the time overhead of repeated error-checking cycles. IBM describes Nighthawk r2’s independent high-speed reset and dynamic-circuit support as tools for quantum-error-correction research. 1719

This does not make Nighthawk r2 fault tolerant. It is an enabling hardware capability for experiments that will be required in error-corrected systems.

A shift from qubit count to usable throughput

Nighthawk r2 keeps the same headline count of 120 programmable qubits while emphasizing speed, connectivity, initialization quality, and gate performance. IBM’s Nighthawk architecture uses a square lattice with up to four connections per qubit, compared with the up-to-three-neighbor connectivity of its earlier heavy-hex layout. IBM positions the family as a platform for exploring and scaling quantum advantage before large-scale fault tolerance. 22

That framing is significant. Raw qubit count alone does not determine whether a device can run useful workloads. A processor also needs sufficiently accurate operations, efficient connectivity, reliable initialization, and enough execution throughput to gather results within a practical time.

Where IBM Phoenix fits in IBM’s roadmap

IBM does not present Nighthawk r2 as a fault-tolerant machine. Instead, it is a near-term processor for higher-throughput quantum workloads and for testing dynamic-control techniques relevant to error correction.

IBM has committed to invest more than $10 billion in quantum computing over five years, spanning research and development, capital spending, manufacturing scale-up, ecosystem partnerships, and acquisitions. Its roadmap targets IBM Quantum Starling for 2029; IBM says that planned system will be a modular, error-corrected machine capable of running circuits with 100 million gates on 200 logical qubits. 2924

The headline lesson from Nighthawk r2 is therefore straightforward: quantum hardware progress is not only about fitting more qubits on a chip. IBM’s reported 25× gain comes from removing dead time between runs—an advance that can make today’s 120-qubit hardware more usable while building experience for the faster measurement-and-reset cycles future error-corrected systems will need. 117